Device-side peripheral component interconnect express memory transactions originated by the PCIe device cannot be unconditionally mapped to host memory due to the necessity of using subtractive decoding to determine which device accesses need to be routed to the host for direct transfers, versus which accesses are routed to RAID internal memory. If all input/output transfers were buffered in the RAID controller through double data rate memory, subtractive decoding would not be necessary, and the device-facing address maps could be decoupled from the host-facing peripheral component interconnect express address map. However, this would introduce serious degradation in performance.
Consequently, it would be advantageous if an apparatus existed that is suitable for mapping addresses in a host domain to addresses in a device domain.